深圳安盛宇电子有限公司

The low-density STM8L151x2/3 ultra-low-power devices feature an enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations. The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive in-application debugging and ultrafast Flash programming.
All low-density STM8L151x2/3 microcontrollers feature embedded data EEPROM and low-power low-voltage single-supply program Flash memory.
The devices incorporate an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, two comparators, a real-time clock, two 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as an SPI, an I2C interface, and one USART. The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools.

All features
Operating conditions
Operating power supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
Temperature range: -40 to 85 or 125 °C

Low power features
5 low-power modes: Wait, Low power run, Low-power wait, Active-halt with RTC, Halt
Ultra-low leakage per I/0: 50 nA
Fast wakeup from Halt: 5 μs

Advanced STM8 core
Harvard architecture and 3-stage pipeline
Max freq: 16 MHz, 16 CISC MIPS peak
Up to 40 external interrupt sources

Reset and supply management
Low-power, ultra safe BOR reset with 5 selectable thresholds
Ultra-low power POR/PDR
Programmable voltage detector (PVD)

Clock management
32 kHz and 1-16 MHz crystal oscillators
Internal 16 MHz factory-trimmed RC
Internal 38 kHz low consumption RC
Clock security system

Low power RTC
BCD calendar with alarm interrupt
Digital calibration with +/- 0.5 ppm accuracy
LSE security system
Auto-wakeup from Halt w/ periodic interrupt

Memories
Up to 8 Kbyte of Flash program memory plus 256 byte of data EEPROM with ECC
Flexible write/read protection modes
1 Kbyte of RAM

DMA
4 channels supporting ADC, SPI, I2C, USART, timers
1 channel for memory-to-memory
12-bit ADC up to 1 Msps/28 channels
Temp. sensor and internal ref. voltage

2 ultra-low-power comparators
1 with fixed threshold and 1 rail to rail
Wakeup capability

Timers
Two 16-bit timers with 2 channels (IC, OC, PWM), quadrature encoder (TIM2, TIM3)
One 8-bit timer with 7-bit prescaler (TIM4)
1 Window and 1 independent watchdog
Beeper timer with 1, 2 or 4 kHz frequencies

Communication interfaces
One synchronous serial interface (SPI)
Fast I2C 400 kHz
One USART

Up to 41 I/Os, all mappable on interrupt vectors
Up to 20 capacitive sensing channels supporting touchkey, proximity touch, linear touch, and rotary touch sensors
Development support
Fast on-chip programming and non-intrusive debugging with SWIM
Bootloader using USART

96-bit unique ID