DescriptionThe low-density STM8L151x2/3 ultra-low-power devices feature an enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations. The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive in-application debugging and ultrafast Flash programming. All low-density STM8L151x2/3 microcontrollers feature embedded data EEPROM and low-power low-voltage single-supply program Flash memory. The devices incorporate an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, two comparators, a real-time clock, two 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as an SPI, an I2C interface, and one USART. The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools.All features12-bit ADC up to 1 Msps/28 channels
2 ultra-low-power comparators
Timers Two 16-bit timers with 2 channels (IC, OC, PWM), quadrature encoder (TIM2, TIM3) One 8-bit timer with 7-bit prescaler (TIM4) 1 Window and 1 independent watchdog Beeper timer with 1, 2 or 4 kHz frequencies
Communication interfaces
Up to 41 I/Os, all mappable on interrupt vectors Up to 20 capacitive sensing channels supporting touchkey, proximity touch, linear touch, and rotary touch sensors Development support
96-bit unique ID
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