深圳安盛宇电子有限公司

The STM32L443xx devices are the ultra-low-power microcontrollers based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. The STM32L443xx devices embed high-speed memories (256 Kbyte of Flash memory, 64 Kbyte of SRAM), a Quad SPI flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.
The STM32L443xx devices embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, proprietary code readout protection and Firewall.
The devices offer a fast 12-bit ADC (5 Msps), two comparators, one operational amplifier, two DAC channels, an internal voltage reference buffer, a low-power RTC, one general-purpose 32-bit timer, one 16-bit PWM timer dedicated to motor control, four general-purpose 16-bit timers, and two 16-bit low-power timers.
In addition, up to 21 capacitive sensing channels are available. The devices also embed an integrated LCD driver 8x40 or 4x44, with internal step-up converter.
They also feature standard and advanced communication interfaces.

All features
Ultra-low-power with FlexPowerControl
1.71 V to 3.6 V power supply
-40 °C to 85/105/125 °C temperature range
200 nA in VBAT mode: supply for RTC and 32x32-bit backup registers
8 nA Shutdown mode (5 wakeup pins)
28 nA Standby mode (5 wakeup pins)
280 nA Standby mode with RTC
1.0 µA Stop 2 mode, 1.28 µA with RTC
84 µA/MHz run mode
Batch acquisition mode (BAM)
4 µs wakeup from Stop mode
Brown out reset (BOR)
Interconnect matrix

Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait-state execution from Flash memory, frequency up to 80 MHz, MPU, 100DMIPS and DSP instructions
Performance benchmark
1.25 DMIPS/MHz (Drystone 2.1)
273.55 CoreMark® (3.42 CoreMark/MHz @ 80 MHz)

Energy benchmark
347 ULPMark™ CP score
121 ULPMark™ PP score

Clock Sources
4 to 48 MHz crystal oscillator
32 kHz crystal oscillator for RTC (LSE)
Internal 16 MHz factory-trimmed RC (±1%)
Internal low-power 32 kHz RC (±5%)
Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
Internal 48 MHz with clock recovery
2 PLLs for system clock, USB, audio, ADC

Up to 83 fast I/Os, most 5 V-tolerant
RTC with HW calendar, alarms and calibration
LCD 8× 40 or 4× 44 with step-up converter
Up to 21 capacitive sensing channels: support touchkey, linear and rotary touch sensors
11x timers: 1x 16-bit advanced motor-control, 1x 32-bit and 2x 16-bit general purpose, 2x 16-bit basic, 2x low-power 16-bit timers (available in Stop mode), 2x watchdogs, SysTick timer
Memories
256 KB single bank Flash, proprietary code readout protection
64 KB of SRAM including 16 KB with hardware parity check
Quad SPI memory interface

Rich analog peripherals (independent supply)
1x 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 µA/Msps
2x 12-bit DAC output channels, low-power sample and hold
1x operational amplifier with built-in PGA
2x ultra-low-power comparators

AES: 128/256-bit key encryption hardware accelerator
17x communication interfaces
USB 2.0 full-speed crystal less solution with LPM and BCD
1x SAI (serial audio interface)
3x I2C FM+(1 Mbit/s), SMBus/PMBus
4x USARTs (ISO 7816, LIN, IrDA, modem)
1x LPUART (Stop 2 wake-up)
3x SPIs (and 1x Quad SPI)
CAN (2.0B Active) and SDMMC interface
SWPMI single wire protocol master I/F
IRTIM (Infrared interface)

14-channel DMA controller
True random number generator
CRC calculation unit, 96-bit unique ID
Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
All packages are ECOPACK2® compliant